555 Timer Calculator
Compute frequency, period, and duty cycle for 555 astable oscillators, or pulse width for 555 monostable one-shots. Includes a live schematic and output waveform.
R1
R2
C
Frequency
f = 15 Hz
T = 66.5 ms (period)
Timing
Practical Examples
- 1 Hz blink LED (astable) — R1 = 10 kΩ, R2 = 68 kΩ, C = 10 µF gives ≈ 0.97 Hz at 53 % duty. Drive an LED through a 1 kΩ resistor off pin 3 — instant heartbeat indicator.
- Audio tone ~1 kHz (astable) — R1 = 1 kΩ, R2 = 6.8 kΩ, C = 100 nF gives ≈ 1 kHz at 53 % duty. Feed pin 3 through a 100 nF cap and a 10 kΩ pot into a small speaker for a buzzer.
- Half-second pulse (monostable) — R = 470 kΩ, C = 1 µF gives T ≈ 0.52 s. Useful for debounce extension or driving a relay long enough for a mechanical action to complete.
How it works
The 555 contains two comparators with thresholds at Vcc/3 and 2·Vcc/3, an SR flip-flop, and a discharge transistor on pin 7. In astable mode the cap charges through R1 + R2 toward Vcc; when it crosses 2·Vcc/3 the flip-flop flips and pin 7 starts discharging the cap through R2 alone; at Vcc/3 the flip-flop flips back and the cycle repeats. The asymmetric charge / discharge paths are why standard astable duty is always above 50 %.
In monostable mode pin 7 is tied to pin 6, so the cap normally sits at 0 V with the discharge transistor on. A negative pulse on pin 2 sets the flip-flop, turns the transistor off, and lets the cap charge through R until it crosses 2·Vcc/3 — which takes about 1.1 · R · C. The flip-flop then resets, the cap dumps, and the output goes low until the next trigger.
Because both thresholds are fixed fractions of Vcc, timing doesn't depend on supply voltage — a 555 running at 5 V produces the same frequency as the same circuit at 12 V. What changes is output drive level, switching speed, and the allowed supply range (4.5–16 V for the bipolar NE555; 2–18 V for CMOS variants like TLC555 or LMC555).
Design rules of thumb
- Keep R between 1 kΩ and 1 MΩ — Below 1 kΩ stresses the internal discharge transistor; above 1 MΩ, leakage and bias currents start to dominate timing.
- Avoid C below 100 pF and above ~1000 µF — Tiny caps lose to stray capacitance; large electrolytics drift with temperature and leakage. Film or NP0 ceramic gives the best stability.
- For ≤ 50 % duty, add a diode — Put a 1N4148 across R2 (anode to pin 7, cathode to pin 6) so charging bypasses R2. Then T_high ≈ 0.693 · R1 · C and T_low ≈ 0.693 · R2 · C.
- Decouple the supply — Put a 100 nF ceramic from pin 8 to GND right at the chip — 555 output edges are fast and the supply current spikes are real.
- Bypass pin 5 (CTRL) — A 10 nF cap from pin 5 to GND keeps the threshold reference clean. Skip only if you're intentionally modulating the threshold.
- Expect ±5–10 % timing tolerance — Internal threshold tolerance plus cap tolerance dominates. For better than that, use an RC oscillator with a microcontroller or a crystal.
FAQ
Why is astable duty cycle always above 50 %?
In the standard topology the capacitor charges through R1 + R2 but discharges through R2 alone. The charge path is always longer, so T_high > T_low. The closest you get to 50 % is making R2 much larger than R1, which pushes the duty toward R2 / (2·R2) = 50 % asymptotically.
How do I get exactly 50 % duty (or under)?
Add a small-signal diode (e.g. 1N4148) across R2 — anode on pin 7 (DIS), cathode on pin 6 (THR). The cap then charges only through R1 and discharges only through R2, so duty = R1 / (R1 + R2). Equal resistors give about 50 %.
Does the supply voltage change the frequency?
No. The 555's thresholds (Vcc/3 and 2·Vcc/3) scale with Vcc, so the timing is supply-independent. What changes with Vcc is output drive strength, switching speed, and the minimum supply (4.5 V for NE555).
NE555 vs CMOS 555 (TLC555 / LMC555)?
CMOS versions run at lower supply voltages (down to 2 V), draw far less current, and produce cleaner output edges. The bipolar NE555 sinks/sources up to ~200 mA so it can drive LEDs and small relays directly. Use CMOS for battery-powered low-frequency circuits; bipolar when you need output drive.
Why does my output frequency drift over time?
Usually the capacitor — especially electrolytics, which can swing ±20 % with temperature and age. Switch to a film or NP0 ceramic cap for stable timing. Other culprits: supply ripple feeding into pin 5 (always bypass it), and parasitic capacitance if R is very large.
Can I cascade two 555s?
Yes. A common trick is one 555 as a slow astable feeding the reset (pin 4) of a second 555 running as a faster astable — that produces gated tones, like a bird-chirp generator. Or feed the output of a monostable into the trigger of another for sequenced pulses.
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